QuietSith Posted June 11, 2002 Share Posted June 11, 2002 http://www.amiga.com/products/A1200.shtml Preemptive, and a true onboard GPU. The 1200 was a beefed up 500 with an HD. Amiga 500 info: "Theory of Operation The AMIGA computer is a high-performance system with advanced graphics and audio features. The Principal hardware features consist of the 68000 microprocessor which runs at 7.2 MHz, 512K RAM, expandable to 1 meg, and configurable to 8MB, 2 parallel I/O chip, one control chip (GARY) and 3 custom VLSI chips that provide the unique capabilities for animation, graphics and sound. 68000 Microprocessor The 68000 is the CPU of the system. All other resources are under software control via control data issued from it. All 3 custom chips have control registers that are written by the 68000. The 68000 communicates with the rest of the computer via its address bus, data bus and control lines. The 3 custom chips do not reside directly on the 68000 buses. When the 68000 starts a bus cycle that is intended for the custom chips or the display RAM, the bust controll chip detects whether or not the display RAM buses are available. THe control chip will not assert the acknowledge signal (DTACK) back to the 68000 until the display buses are available. Once the 68000 recieves /DTACK it completes the bus cycle. Because the display RAM is capable of approximately twice the bandwidth of the 68000, the 68000 is usually not delayed by waiting for the display buses to become available. The 68000 can fetch the instructions from: Display RAM ROM The 68000 can read and write data directly to: Display RAM Parallel I/O chips 3 custom I.C.s ROM The 68000 transmits data and control to and from the peripherals via the parallel I/O and the 3 custom chips. /M is the processor clock to the 68000. C1,C3 and CDAC are used to clock the customs chips and determine the timing of signals to the memory arrays. ROMS The ROM contains the kernel and DOS routines; it is 128K * 16 Parallel I/O The multipurpose 8520 I/O chips provide the following: I/O to and from the parallel port connector Control lines to and from the joystick/mouse ports A control line to the front panel LED Internal control line Keyboard control lines, clock and data Serial port control lines Floppy disk interface control lines Internal timers Clocks Generator The entire computer board is synchronous to the 3.579545 MHz color clock. This is accomplished by generating a number of submultiple frequencies from the master 28.63636 MHz NTSC (or 28.37516 for PA) crystal oscillator. All clocks are generated by the Fat Agnus custom chip. The following are primary clock: C1 3.579545 MHz color clock C3 C2 shifted 45 degrees later 7M C1 XORed with C3 = 7.15909 MHz CDAC 7M shifted 90 degrees later The 3 Custom Chips The 3 custom chips provide very fast manipulation of graphics and audio data in the display RAM. All the major functions in the chips are DMA driven: that is, streams of data are moved between the custom chips and the display RAM under DMA control. These streams of data are acted upon by the custom chips. Fat Agnus, custom chip #1, contains 25 dedicated purpose DMA counters. The 3 chips have control registers which are usually loaded by the 68000. However, Fat Agnus also has the capability of loading control registersin the other 2 custom chips. When Fat Agnus perfoms a bus cycle, it outputs a code on the Register Address Bus telling the other 2 chips the nature of the bus cycle. This is necessary because many of the bus cycles provide data to or from the other 2 chips, thus they must cooperate appropriately. In addition to manipulating data in the display RAM, the custom chips output streams of data to the video output circuits and audio output circuits, and they move data to and from the floppy disks and serial port. Note that the display RAM buses can be completely isolated from the 68000 buses by Fat Agnus and Data Bus drivers. Thus, Fat Agnus can be performing a bus cycle on the display buses simultaneosly with the 68000 performing a bus cycle on its buses. This parallelism increases throughput. Bus Control, Address/Data MUX, Address Driver The bus control logic resides in the control chip (GARY) and Fat Agnus. They provide 3 major functions, they: Synchronize the 68000 to the current phase of C1 Arbitrate between the 68000 an Fat Agnus for display buses Generate DRAM timing for the video RAM bus drivers appropriate to the current cycle. Synchronizing the 68000 to C1 is straightforward, since the 68000 is clocked by 7M which is twice the frequency and synchronous to C1. If the 68000 starts a bus cycle in the wrong phase of C1, the bus cycle chip merely delays /DTACK long enough so that the 68000 will complete the bus cycle in the desired phase relationship to C1. This phase relationship is necessary because the custom chips and the display RAM are clock by C1. Arbitrationis very simple. Fat Agnus tells the bus control prior to taking the display RAM buses by asserting an input to the the control chip (GARY) called /DBR. Whenever Fat Agnus has the display buses and the 68000 wants them, the 68000 is held off by not giving it /DTACK. In this state the 68000 has no effect on the display buses until the bus contoller enables the bus drivers. Fat Agnus generates the DRAM timing and does all address multiplxing. If the 68000 is running a video memory cycle, its addresses are routed through Fat Agnus onto the multiplexed address lines. If the custom chips are running a memory cycle the addresses are routed to the multiplexed address lines from the internal address register. Diplay RAM The display RAM is a 512K read/write memory that resides on the RAM address and RAM data buses. It is expandable to 1M bytes by the addition of the RAM expansion module. It is implemented using standard 256K * 1 dynamic RAMs, refresh by Fat Agnus. The display RAM is really used for much more than just holding graphics data. It also stores code and data for the 68000. Custom Control Chips The Amiga's animation, graphics and sound are produced by three custom chips. Fat Agnus (8370), Denise (8362) and Paula (8364). A fourth custom chip, Gary serves as the control chip." http://www.cyberusa.com/~cholowat/html/Amiga.html Link to comment Share on other sites More sharing options...
Boba Rhett Posted June 11, 2002 Share Posted June 11, 2002 I still have an Amiga. Good times, man. *sniff* Good times... Link to comment Share on other sites More sharing options...
QuietSith Posted June 11, 2002 Author Share Posted June 11, 2002 Do you have a shoe box full of games? Link to comment Share on other sites More sharing options...
Boba Rhett Posted June 11, 2002 Share Posted June 11, 2002 Actually it's a wooden box, but close enough. Link to comment Share on other sites More sharing options...
Recommended Posts
Archived
This topic is now archived and is closed to further replies.